TY - JOUR
T1 - A Full-Duplex Based Integrated Sensing and Communication Survey
T2 - Principles, Key Techniques, and Receiver Design
AU - Du, Changhao
AU - Zhang, Hongru
AU - Zhang, Xueting
AU - Zhao, Zizheng
AU - Yang, Jie
AU - Zhang, Xinyuan
AU - Xing, Zhifang
AU - Feng, Zhipeng
AU - Zuo, Shiyu
AU - Xu, Canni
AU - Leng, Yongqing
AU - Zhang, Zhongshan
N1 - Publisher Copyright:
© 1998-2012 IEEE.
PY - 2025
Y1 - 2025
N2 - Integrated Sensing and Communication (ISAC), recognized as a cornerstone technology for sixth-generation (6G) cellular networks, achieves hardware complexity reduction and power efficiency through unified waveform and spectral resource multiplexing. By integrating Full-Duplex (FD) technology into ISAC systems, FD-ISAC surpasses conventional Time Division Duplex (TDD)-ISAC architectures by enhancing communication capacity, eliminating sensing blind area, and enabling seamless communication-sensing coordination. This survey systematically explores the technological framework of FD-ISAC. Specifically, fundamental theories for downlink ISAC are established initially, emphasizing communication-centric waveform designs and channel modeling techniques. Subsequently, a comprehensive FD-ISAC system model is developed, incorporating critical analyses of enabling technologies such as self-interference cancellation (SIC) mechanisms and radar sensing frameworks. State-of-the-art hardware implementations are then presented, featuring FD-SIC-optimized communication modules integrated with FD sensing subsystems. To address scalability constraints, miniaturization challenges are rigorously examined through the proposal of on-chip integration strategies specifically engineered for micro-platform deployments. Concluding the analysis, pressing technical bottlenecks are systematically identified, with future research trajectories formulated to advance FD-ISAC deployment.
AB - Integrated Sensing and Communication (ISAC), recognized as a cornerstone technology for sixth-generation (6G) cellular networks, achieves hardware complexity reduction and power efficiency through unified waveform and spectral resource multiplexing. By integrating Full-Duplex (FD) technology into ISAC systems, FD-ISAC surpasses conventional Time Division Duplex (TDD)-ISAC architectures by enhancing communication capacity, eliminating sensing blind area, and enabling seamless communication-sensing coordination. This survey systematically explores the technological framework of FD-ISAC. Specifically, fundamental theories for downlink ISAC are established initially, emphasizing communication-centric waveform designs and channel modeling techniques. Subsequently, a comprehensive FD-ISAC system model is developed, incorporating critical analyses of enabling technologies such as self-interference cancellation (SIC) mechanisms and radar sensing frameworks. State-of-the-art hardware implementations are then presented, featuring FD-SIC-optimized communication modules integrated with FD sensing subsystems. To address scalability constraints, miniaturization challenges are rigorously examined through the proposal of on-chip integration strategies specifically engineered for micro-platform deployments. Concluding the analysis, pressing technical bottlenecks are systematically identified, with future research trajectories formulated to advance FD-ISAC deployment.
KW - Full-Duplex (FD)
KW - Integrated Sensing and Communication (ISAC)
KW - Sixth generation (6G)
KW - System-on-Chip (SoC)
KW - channel model
KW - radar sensing
KW - self-interference (SI) cancellation
KW - waveform design
UR - http://www.scopus.com/pages/publications/105009433047
U2 - 10.1109/COMST.2025.3582948
DO - 10.1109/COMST.2025.3582948
M3 - Article
AN - SCOPUS:105009433047
SN - 1553-877X
JO - IEEE Communications Surveys and Tutorials
JF - IEEE Communications Surveys and Tutorials
ER -